Lattice Mapping Report File for Design Module 'top' Design Information Command line: map -a MachXO2 -p LCMXO2-1200HC -t TQFP100 -s 6 -oc Commercial Kurs11_impl1.ngd -o Kurs11_impl1_map.ncd -pr Kurs11_impl1.prf -mp Kurs11_impl1.mrp -lpf D:/Lattice/Kurs11/impl1/Kurs11_impl1.lpf -lpf D:/Lattice/Kurs11/impl1/source/kurs11.lpf -c 0 -gui -msgset D:/Lattice/Kurs11/promote.xml Target Vendor: LATTICE Target Device: LCMXO2-1200HCTQFP100 Target Performance: 6 Mapper: xo2c00, version: Diamond (64-bit) 3.12.1.454 Mapped on: 03/20/23 22:03:34 Design Summary Number of registers: 24 out of 1520 (2%) PFU registers: 24 out of 1280 (2%) PIO registers: 0 out of 240 (0%) Number of SLICEs: 24 out of 640 (4%) SLICEs as Logic/ROM: 24 out of 640 (4%) SLICEs as RAM: 0 out of 480 (0%) SLICEs as Carry: 17 out of 640 (3%) Number of LUT4s: 48 out of 1280 (4%) Number used as logic LUTs: 14 Number used as distributed RAM: 0 Number used as ripple logic: 34 Number used as shift registers: 0 Number of PIO sites used: 17 + 4(JTAG) out of 80 (26%) Number of block RAMs: 0 out of 7 (0%) Number of GSRs: 1 out of 1 (100%) EFB used : No JTAG used : No Readback used : No Oscillator used : Yes Startup used : No POR : On Bandgap : On Number of Power Controller: 0 out of 1 (0%) Number of Dynamic Bank Controller (BCINRD): 0 out of 4 (0%) Number of Dynamic Bank Controller (BCLVDSO): 0 out of 1 (0%) Number of DCCA: 0 out of 8 (0%) Number of DCMA: 0 out of 2 (0%) Number of PLLs: 0 out of 1 (0%) Number of DQSDLLs: 0 out of 2 (0%) Number of CLKDIVC: 0 out of 4 (0%) Number of ECLKSYNCA: 0 out of 4 (0%) Number of ECLKBRIDGECS: 0 out of 2 (0%) Notes:- 1. Total number of LUT4s = (Number of logic LUT4s) + 2*(Number of distributed RAMs) + 2*(Number of ripple logic) 2. Number of logic LUT4s does not include count of distributed RAM and ripple logic. Number of clocks: 1 Net Clock: 12 loads, 12 rising, 0 falling (Driver: OSCH_inst ) Number of Clock Enables: 0 Number of LSRs: 0 Number of nets driven by tri-state buffers: 0 Top 10 highest fanout non-clock nets: Net Y_7_N_1_1: 16 loads Net Y_7_N_1_0: 15 loads Net A_sync_2: 13 loads Net A_sync_3: 9 loads Net n468: 7 loads Net A_sync_4: 6 loads Net n469: 6 loads Net n201: 5 loads Net A_sync_5: 4 loads Net n202: 4 loads Number of warnings: 1 Number of errors: 0 Design Errors/Warnings WARNING - map: OSCH 'OSCH_inst' has FREQUENCY preference value set to 133.01 MHZ, which is different from the actual value 133.00 MHZ. The FREQUENCY preference is still within the 5.5% tolerence of the actual value. IO (PIO) Attributes +---------------------+-----------+-----------+------------+ | IO Name | Direction | Levelmode | IO | | | | IO_TYPE | Register | +---------------------+-----------+-----------+------------+ | Y[7] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Y[1] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[6] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[0] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Y[2] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[7] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[3] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[1] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Reset | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[4] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[2] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Y[5] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Y[6] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Y[3] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Y[4] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | Y[0] | OUTPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ | A[5] | INPUT | LVCMOS25 | | +---------------------+-----------+-----------+------------+ Removed logic Block i213 undriven or does not drive anything - clipped. Signal Y_7_N_1_2 was merged into signal A_sync_2 Signal GND_net undriven or does not drive anything - clipped. Signal Y_7_N_11_2 undriven or does not drive anything - clipped. Signal VCC_net undriven or does not drive anything - clipped. Signal Y_7__I_0_6/CO undriven or does not drive anything - clipped. Signal Y_7__I_0_2/S0 undriven or does not drive anything - clipped. Signal Y_7__I_0_2/CI undriven or does not drive anything - clipped. Signal mult_6u_8u_0_mult_4_0/CO undriven or does not drive anything - clipped. Signal mult_6u_8u_0_mult_2_1/CO undriven or does not drive anything - clipped. Signal mult_6u_8u_0_mult_0_2/CO undriven or does not drive anything - clipped. Signal t_mult_6u_8u_0_add_1_2/S1 undriven or does not drive anything - clipped. Signal t_mult_6u_8u_0_add_1_2/COUT undriven or does not drive anything - clipped. Signal Cadd_t_mult_6u_8u_0_1_1/S0 undriven or does not drive anything - clipped. Signal mult_6u_8u_0_add_0_3/COUT undriven or does not drive anything - clipped. Signal Cadd_mult_6u_8u_0_0_1/S0 undriven or does not drive anything - clipped. Signal mult_6u_8u_0_cin_lr_add_4/S1 undriven or does not drive anything - clipped. Signal mult_6u_8u_0_cin_lr_add_4/S0 undriven or does not drive anything - clipped. Signal mult_6u_8u_0_cin_lr_add_2/S1 undriven or does not drive anything - clipped. Signal mult_6u_8u_0_cin_lr_add_2/S0 undriven or does not drive anything - clipped. Signal mult_6u_8u_0_cin_lr_add_0/S1 undriven or does not drive anything - clipped. Signal mult_6u_8u_0_cin_lr_add_0/S0 undriven or does not drive anything - clipped. Block i157_2_lut was optimized away. Block i1 was optimized away. Block AND2_t2 was optimized away. OSC Summary ----------- OSC 1: Pin/Node Value OSC Instance Name: OSCH_inst OSC Type: OSCH STDBY Input: NONE OSC Output: NODE Clock OSC Nominal Frequency (MHz): 133.00 ASIC Components --------------- Instance Name: OSCH_inst Type: OSCH GSR Usage --------- GSR Component: The Global Set Reset (GSR) resource has been used to implement a global reset of the design. The reset signal used for GSR control is 'Reset_c'. GSR Property: The design components with GSR property set to ENABLED will respond to global set reset while the components with GSR property set to DISABLED will not. Run Time and Memory Usage ------------------------- Total CPU Time: 0 secs Total REAL Time: 0 secs Peak Memory Usage: 30 MB Copyright (c) 1991-1994 by NeoCAD Inc. All rights reserved. Copyright (c) 1995 AT&T Corp. All rights reserved. Copyright (c) 1995-2001 Lucent Technologies Inc. All rights reserved. Copyright (c) 2001 Agere Systems All rights reserved. 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