pn241027123038
#Start recording tcl command: 10/27/2024 10:41:24
#Project Location: C:/Lattice/Kurs29; Project name: Kurs29
prj_project new -name "Kurs29" -impl "impl1" -dev LCMXO2-1200HC-5TG100C -synthesis "lse"
prj_project save
file copy -force -- "C:/verilog/vga/05_text_terminal/top.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/top.v"
file copy -force -- "C:/verilog/vga/05_text_terminal/vga.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/vga.v"
file copy -force -- "C:/verilog/uart_rx/uart_rx.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/uart_rx.v"
file copy -force -- "C:/verilog/synchronizer/synchronizer.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/synchronizer.v"
file copy -force -- "C:/verilog/edge_detector/edge_detector.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/edge_detector.v"
file copy -force -- "C:/verilog/strobe_generator_ticks/strobe_generator_ticks.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/strobe_generator_ticks.v"
file copy -force -- "C:/verilog/display_multiplexed_variable/display_multiplex.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/display_multiplex.v"
file copy -force -- "C:/verilog/decoder_7seg/decoder_7seg.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/decoder_7seg.v"
file copy -force -- "C:/verilog/strobe_generator/strobe_generator.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/strobe_generator.v"
file copy -force -- "C:/verilog/vga/05_text_terminal/memory.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/memory.v"
file copy -force -- "C:/verilog/ram_pseudo_dual_port/ram_pdp.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/ram_pdp.v"
file copy -force -- "C:/verilog/rom/rom.v" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/rom.v"
prj_run Synthesis -impl impl1
file copy -force -- "C:/verilog/vga/05_text_terminal/font_0_127.mem" "C:/Lattice/Kurs29/impl1/source"
prj_src add "C:/Lattice/Kurs29/impl1/source/font_0_127.mem"
prj_run Synthesis -impl impl1
#Stop recording: 10/27/2024 12:30:38



pn241219221736
#Start recording tcl command: 12/19/2024 19:30:21
#Project Location: C:/Lattice/Kurs29; Project name: Kurs29
prj_project open "C:/Lattice/Kurs29/Kurs29.ldf"
prj_run Map -impl impl1
prj_run PAR -impl impl1
prj_run Synthesis -impl impl1 -forceOne
prj_run Map -impl impl1
prj_run PAR -impl impl1
#Stop recording: 12/19/2024 22:17:36



pn241222140705
#Start recording tcl command: 12/22/2024 12:57:08
#Project Location: C:/Lattice/Kurs29; Project name: Kurs29
prj_project open "C:/Lattice/Kurs29/Kurs29.ldf"
#Stop recording: 12/22/2024 14:07:05