| Hierarchy |
Input |
Constant Input |
Unused Input |
Floating Input |
Output |
Constant Output |
Unused Output |
Floating Output |
Bidir |
Constant Bidir |
Unused Bidir |
Input only Bidir |
Output only Bidir |
| rst_controller|alt_rst_req_sync_uq1 |
2 |
1 |
0 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| rst_controller|alt_rst_sync_uq1 |
2 |
0 |
0 |
0 |
1 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| rst_controller |
33 |
31 |
0 |
31 |
2 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| irq_mapper |
3 |
31 |
2 |
31 |
32 |
31 |
31 |
31 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_004|error_adapter_0 |
38 |
1 |
2 |
1 |
37 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_004 |
38 |
0 |
0 |
0 |
37 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_003|error_adapter_0 |
38 |
1 |
2 |
1 |
37 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_003 |
38 |
0 |
0 |
0 |
37 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_002|error_adapter_0 |
38 |
1 |
2 |
1 |
37 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_002 |
38 |
0 |
0 |
0 |
37 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_001|error_adapter_0 |
38 |
1 |
2 |
1 |
37 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter_001 |
38 |
0 |
0 |
0 |
37 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter|error_adapter_0 |
22 |
1 |
2 |
1 |
21 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|avalon_st_adapter |
22 |
0 |
0 |
0 |
21 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_cmd_width_adapter |
107 |
3 |
0 |
3 |
84 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_rsp_width_adapter|uncompressor |
33 |
4 |
0 |
4 |
24 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_rsp_width_adapter |
89 |
3 |
0 |
3 |
102 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_mux_001|arb|adder |
8 |
4 |
0 |
4 |
4 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_mux_001|arb |
6 |
0 |
4 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_mux_001 |
205 |
0 |
0 |
0 |
103 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_mux|arb|adder |
20 |
10 |
0 |
10 |
10 |
10 |
10 |
10 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_mux|arb |
9 |
0 |
4 |
0 |
5 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_mux |
508 |
0 |
0 |
0 |
106 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_demux_004 |
104 |
1 |
2 |
1 |
102 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_demux_003 |
104 |
1 |
2 |
1 |
102 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_demux_002 |
105 |
4 |
2 |
4 |
203 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_demux_001 |
105 |
4 |
2 |
4 |
203 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|rsp_demux |
104 |
1 |
2 |
1 |
102 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_004 |
104 |
0 |
2 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_003 |
104 |
0 |
2 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_002|arb|adder |
8 |
2 |
0 |
2 |
4 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_002|arb |
6 |
0 |
1 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_002 |
205 |
0 |
0 |
0 |
103 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_001|arb|adder |
8 |
2 |
0 |
2 |
4 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_001|arb |
6 |
0 |
1 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux_001 |
205 |
0 |
0 |
0 |
103 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_mux |
104 |
0 |
2 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_demux_001 |
105 |
4 |
2 |
4 |
203 |
4 |
4 |
4 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|cmd_demux |
108 |
25 |
2 |
25 |
506 |
25 |
25 |
25 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_burst_adapter|altera_merlin_burst_adapter_uncompressed_only.burst_adapter |
86 |
3 |
5 |
3 |
84 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_burst_adapter |
86 |
0 |
0 |
0 |
84 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_006|the_default_decode |
0 |
5 |
0 |
5 |
5 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_006 |
99 |
0 |
2 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_005|the_default_decode |
0 |
5 |
0 |
5 |
5 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_005 |
99 |
0 |
2 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_004|the_default_decode |
0 |
5 |
0 |
5 |
5 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_004 |
99 |
0 |
2 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_003|the_default_decode |
0 |
5 |
0 |
5 |
5 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_003 |
99 |
0 |
2 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_002|the_default_decode |
0 |
5 |
0 |
5 |
5 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_002 |
81 |
0 |
2 |
0 |
84 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_001|the_default_decode |
0 |
8 |
0 |
8 |
8 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router_001 |
99 |
0 |
5 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router|the_default_decode |
0 |
8 |
0 |
8 |
8 |
8 |
8 |
8 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|router |
99 |
0 |
5 |
0 |
102 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|pio_0_s1_agent_rsp_fifo |
139 |
39 |
0 |
39 |
98 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|pio_0_s1_agent|uncompressor |
33 |
1 |
0 |
1 |
31 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|pio_0_s1_agent |
276 |
39 |
42 |
39 |
291 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|timer_0_s1_agent_rsp_fifo |
139 |
39 |
0 |
39 |
98 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|timer_0_s1_agent|uncompressor |
33 |
1 |
0 |
1 |
31 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|timer_0_s1_agent |
276 |
39 |
42 |
39 |
291 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|onchip_memory2_0_s1_agent_rsp_fifo |
139 |
39 |
0 |
39 |
98 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|onchip_memory2_0_s1_agent|uncompressor |
33 |
1 |
0 |
1 |
31 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|onchip_memory2_0_s1_agent |
276 |
39 |
42 |
39 |
291 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_debug_mem_slave_agent_rsp_fifo |
139 |
39 |
0 |
39 |
98 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_debug_mem_slave_agent|uncompressor |
33 |
1 |
0 |
1 |
31 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_debug_mem_slave_agent |
276 |
39 |
42 |
39 |
291 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_agent_rsp_fifo |
121 |
39 |
0 |
39 |
80 |
39 |
39 |
39 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_agent|uncompressor |
33 |
1 |
0 |
1 |
31 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_agent |
208 |
22 |
26 |
22 |
220 |
22 |
22 |
22 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_instruction_master_agent |
164 |
37 |
70 |
37 |
131 |
37 |
37 |
37 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_data_master_agent |
164 |
37 |
70 |
37 |
131 |
37 |
37 |
37 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|pio_0_s1_translator |
100 |
6 |
18 |
6 |
70 |
6 |
6 |
6 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|timer_0_s1_translator |
84 |
22 |
33 |
22 |
55 |
22 |
22 |
22 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|onchip_memory2_0_s1_translator |
100 |
7 |
4 |
7 |
86 |
7 |
7 |
7 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_debug_mem_slave_translator |
100 |
5 |
8 |
5 |
82 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|hex7led_0_avalon_slave_0_translator |
65 |
22 |
16 |
22 |
38 |
22 |
22 |
22 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_instruction_master_translator |
101 |
51 |
0 |
51 |
93 |
51 |
51 |
51 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0|nios2_gen2_0_data_master_translator |
101 |
12 |
0 |
12 |
93 |
12 |
12 |
12 |
0 |
0 |
0 |
0 |
0 |
| mm_interconnect_0 |
189 |
0 |
0 |
0 |
243 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| timer_0 |
23 |
0 |
15 |
0 |
17 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| pio_0 |
38 |
28 |
28 |
28 |
36 |
28 |
28 |
28 |
0 |
0 |
0 |
0 |
0 |
| onchip_memory2_0|the_altsyncram|auto_generated |
52 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| onchip_memory2_0 |
55 |
0 |
1 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_debug_slave_wrapper|the_NIOS_LED_nios2_gen2_0_cpu_debug_slave_sysclk |
43 |
0 |
0 |
0 |
48 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_debug_slave_wrapper|the_NIOS_LED_nios2_gen2_0_cpu_debug_slave_tck |
130 |
0 |
1 |
0 |
43 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_debug_slave_wrapper |
123 |
0 |
0 |
0 |
50 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_ocimem|NIOS_LED_nios2_gen2_0_cpu_ociram_sp_ram|the_altsyncram|auto_generated |
47 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_ocimem|NIOS_LED_nios2_gen2_0_cpu_ociram_sp_ram |
47 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_ocimem |
92 |
0 |
6 |
0 |
65 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_avalon_reg |
48 |
0 |
29 |
0 |
68 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_im |
54 |
38 |
51 |
38 |
47 |
38 |
38 |
38 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_pib |
0 |
36 |
0 |
36 |
36 |
36 |
36 |
36 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_fifo|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_fifo_cnt_inc |
5 |
0 |
0 |
0 |
5 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_fifo|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_fifo_wrptr_inc |
4 |
2 |
0 |
2 |
4 |
2 |
2 |
2 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_fifo|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_compute_input_tm_cnt |
3 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_fifo |
115 |
0 |
65 |
0 |
36 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_dtrace|NIOS_LED_nios2_gen2_0_cpu_nios2_oci_trc_ctrl_td_mode |
9 |
0 |
6 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_dtrace |
102 |
0 |
91 |
0 |
72 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_itrace |
24 |
54 |
24 |
54 |
54 |
54 |
54 |
54 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_dbrk |
87 |
0 |
0 |
0 |
91 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_xbrk |
53 |
5 |
50 |
5 |
6 |
5 |
5 |
5 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_break |
51 |
36 |
6 |
36 |
71 |
36 |
36 |
36 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci_debug |
50 |
1 |
30 |
1 |
7 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_nios2_oci |
154 |
0 |
0 |
0 |
70 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|NIOS_LED_nios2_gen2_0_cpu_register_bank_b|the_altsyncram|auto_generated |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|NIOS_LED_nios2_gen2_0_cpu_register_bank_b |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|NIOS_LED_nios2_gen2_0_cpu_register_bank_a|the_altsyncram|auto_generated |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|NIOS_LED_nios2_gen2_0_cpu_register_bank_a |
44 |
0 |
0 |
0 |
32 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu|the_NIOS_LED_nios2_gen2_0_cpu_test_bench |
285 |
3 |
251 |
3 |
33 |
3 |
3 |
3 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0|cpu |
149 |
1 |
31 |
1 |
109 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| nios2_gen2_0 |
149 |
1 |
0 |
1 |
109 |
1 |
1 |
1 |
0 |
0 |
0 |
0 |
0 |
| hex7led_0|U4 |
1 |
0 |
0 |
0 |
2 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| hex7led_0|U3 |
2 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| hex7led_0|U2 |
4 |
0 |
0 |
0 |
7 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| hex7led_0|U1 |
18 |
0 |
0 |
0 |
4 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
| hex7led_0 |
22 |
0 |
0 |
0 |
12 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |
0 |